Fetch-Decode-Execute Cycle


In computer architecture, the fetch-decode-execute (FDE) cycle is the fundamental process by which a central processing unit (CPU) retrieves, interprets, and carries out instructions from a computer program. The FDE cycle underpins the operation of nearly all modern computers and describes the sequential logic through which the CPU executes program instructions.

Stages of the FDE Cycle

The FDE cycle consists of three primary stages:


  • The CPU's Program Counter (PC) register contains the memory address of the next instruction.
  • The CPU retrieves the instruction located at the address indicated by the PC from main memory (RAM).
  • The fetched instruction is temporarily stored in the Instruction Register (IR).
  • The Program Counter is updated to point to the location of the next instruction in memory.


  • The Control Unit (CU) within the CPU interprets the instruction code held in the Instruction Register. The CU translates it into control signals.
  • The control signals identify the actions needed to perform the instruction. These could include retrieving data from memory or registers, or performing arithmetic/logic operations.


  • The Arithmetic Logic Unit (ALU) and other appropriate functional units within the CPU execute commands, carrying out the specified actions indicated by the decoded instruction.
  • Any required data might be read from memory or CPU registers.
  • Results of computations might be written back to memory or stored in CPU registers.

Continuous and Pipelined Operation

The FDE cycle repeats rapidly for each instruction in a program. This creates a continuous loop of the processor executing instructions from the program until it is halted. Modern CPUs enhance efficiency by using pipelining – in this, multiple instructions are in different stages of the FDE cycle concurrently.


The fetch-decode-execute cycle is fundamental to understanding the core operations of a computer. Key concepts in computer science, such as instruction sets, processor organization, and assembly language programming, rely on the principles of this cycle.


Here's a simplified example of how the FDE cycle might execute an addition instruction, "ADD X, Y" (meaning add the values in memory locations X and Y):

  • Fetch: The CPU fetches the "ADD X, Y" instruction from memory.
  • Decode: The CPU decodes the instruction, recognizing it as an addition command and locating the addresses of X and Y.
  • Execute: The CPU loads values from memory addresses X and Y, performs the addition in the ALU, and stores the result in a specified location.